STM32F103 HDK
F1 Schematic
STM32F103V 100P
STM32F103Z 144P
Communication
- 3x UART
- 3x SPI 64P, 4x SPI 100P
- 2x I2S
- 2x I2C
- CAN
- USB 2.0
- SDIO
- FMSC - 100P
REF
STM32 F103 Features
Core: ARM 32-bit Cortex ™ -M3 CPU
- Up to 72MHz operating frequency
- Single cycle multiplication and hardware division
Memory
- from 64K or 128K bytes of Flash program memory
- up to 20K bytes of SRAM
Clock, reset and power management
- 2.0 to 3.6 V supply and I / O pins
- Power on / off reset (POR / PDR), programmable voltage monitoring (PVD)
- 4 ~ 16MHz crystal oscillator
- Built-in factory-calibrated 8MHz RC oscillator
- Built-in calibrated 40kHz RC oscillator
- PLL that generates the CPU clock
- 32 kHz RTC oscillator with calibration function
Low power consumption
- Sleep, Standby and Standby modes
- V BAT supplies power to the RTC and the back-up registers
2 of 12-bit analog-to-digital converters, 1us conversion time (up to 16)
- Conversion range: 0 to 3.6V
- Double sampling and hold function
- Temperature sensor
DMA:
- 7-channel DMA controller
- Peripherals supported: timers, ADC, SPI, I 2 C and USART
Up to 80 Fast I / O ports
- 26/37/51/80 I / O ports, all I / O ports can be mapped to 16 external interrupts; almost all ports can tolerate 5V letter number
Debug mode
- Serial single-wire debugging (SWD) and JTAG interfaces
Up to 7 timers
- Three 16-bit timers, up to four for each timer / Input Capture / Output Compare / PWM or Pulse Count channels and incremental encoder inputs
- One 16-bit with dead zone control and emergency brake for motors
- Control the PWM Advanced Control Timer
- Two Watchdog Timers (Standalone and Windowed)
- System time timer: 24-bit self-decrementing counter
Up to 9 communication interfaces
- Up to 2 I 2 C interfaces (Supports SMBus / PMBus)
- Up to 3 USART interfaces (supports ISO7816 interface,
IN, IrDA interface and modem control)
- Up to 2 SPI interfaces (18 Mbit / s)
- CAN interface (2.0B active)
- USB 2.0 full speed interface
CRC computing unit, 96-bit chip unique code