https://w.electrodragon.com/w/index.php?action=history&feed=atom&title=STM32F103_HDKSTM32F103 HDK - Revision history2026-06-05T17:01:48ZRevision history for this page on the wikiMediaWiki 1.37.2https://w.electrodragon.com/w/index.php?title=STM32F103_HDK&diff=30662&oldid=prevChao at 05:10, 16 April 20212021-04-16T05:10:00Z<p></p>
<p><b>New page</b></p><div><br />
== F1 Schematic ==<br />
<br />
STM32F103V 100P<br />
<gallery><br />
File:STM32F103V.png | STM32F103V 09<br />
File:STM32F103VE_06.png | STM32F103 06<br />
</gallery><br />
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STM32F103Z 144P<br />
<gallery><br />
File:STM32F103Z.png | STM32F103Z 08 <br />
File:Stm32f103_07.png | STM32F103 07<br />
</gallery><br />
<br />
=== Communication ===<br />
* 3x UART<br />
* 3x SPI 64P, 4x SPI 100P<br />
* 2x I2S<br />
* 2x I2C<br />
* CAN<br />
* USB 2.0<br />
* SDIO<br />
* FMSC - 100P<br />
<br />
=== REF ===<br />
* https://www.findic.com/doc/browser/Bedo74PLK?doc_id=17017541#locale=zh-CN<br />
* MiniSTM 正点原子<br />
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==== STM32 F103 Features ====<br />
Core: ARM 32-bit Cortex ™ -M3 CPU<br />
* Up to 72MHz operating frequency<br />
* Single cycle multiplication and hardware division<br />
Memory<br />
* from 64K or 128K bytes of Flash program memory<br />
* up to 20K bytes of SRAM<br />
<br />
Clock, reset and power management<br />
* 2.0 to 3.6 V supply and I / O pins<br />
* Power on / off reset (POR / PDR), programmable voltage monitoring (PVD)<br />
* 4 ~ 16MHz crystal oscillator<br />
* Built-in factory-calibrated 8MHz RC oscillator<br />
* Built-in calibrated 40kHz RC oscillator<br />
* PLL that generates the CPU clock<br />
* 32 kHz RTC oscillator with calibration function<br />
<br />
Low power consumption<br />
* Sleep, Standby and Standby modes<br />
* V BAT supplies power to the RTC and the back-up registers<br />
<br />
2 of 12-bit analog-to-digital converters, 1us conversion time (up to 16)<br />
* Conversion range: 0 to 3.6V<br />
* Double sampling and hold function<br />
* Temperature sensor<br />
<br />
DMA:<br />
* 7-channel DMA controller<br />
* Peripherals supported: timers, ADC, SPI, I 2 C and USART<br />
<br />
Up to 80 Fast I / O ports<br />
* 26/37/51/80 I / O ports, all I / O ports can be mapped to 16 external interrupts; almost all ports can tolerate 5V letter number<br />
<br />
Debug mode<br />
* Serial single-wire debugging (SWD) and JTAG interfaces<br />
<br />
Up to 7 timers<br />
* Three 16-bit timers, up to four for each timer / Input Capture / Output Compare / PWM or Pulse Count channels and incremental encoder inputs<br />
* One 16-bit with dead zone control and emergency brake for motors<br />
* Control the PWM Advanced Control Timer<br />
* Two Watchdog Timers (Standalone and Windowed)<br />
* System time timer: 24-bit self-decrementing counter<br />
<br />
Up to 9 communication interfaces<br />
* Up to 2 I 2 C interfaces (Supports SMBus / PMBus)<br />
* Up to 3 USART interfaces (supports ISO7816 interface,<br />
IN, IrDA interface and modem control)<br />
* Up to 2 SPI interfaces (18 Mbit / s)<br />
* CAN interface (2.0B active)<br />
* USB 2.0 full speed interface<br />
CRC computing unit, 96-bit chip unique code<br />
<br />
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[[category: STM32 HDK]]</div>Chao