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	<title>FPGA Selection - Revision history</title>
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	<updated>2026-07-23T04:30:32Z</updated>
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	<entry>
		<id>https://w.electrodragon.com/w/index.php?title=FPGA_Selection&amp;diff=29880&amp;oldid=prev</id>
		<title>Chao at 13:02, 28 February 2021</title>
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		<updated>2021-02-28T13:02:38Z</updated>

		<summary type="html">&lt;p&gt;&lt;/p&gt;
&lt;p&gt;&lt;b&gt;New page&lt;/b&gt;&lt;/p&gt;&lt;div&gt;== Cheapr Entry Level ==&lt;br /&gt;
* ATF16V8B - SSOP20 - http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-0364-PLD-ATF16V8B-8BQ-8BQL-Datasheet.pdf&lt;br /&gt;
* GAL16V8 - discountined - &lt;br /&gt;
* XC9572&lt;br /&gt;
* XC9563&lt;br /&gt;
* EPM250 / EPM570&lt;br /&gt;
== FPGA Resouces, Architecture== &lt;br /&gt;
&amp;lt;gallery&amp;gt;&lt;br /&gt;
File:2018-06-09_045431.png | 01&lt;br /&gt;
File:2018-06-09_045449.png | 02&lt;br /&gt;
&amp;lt;/gallery&amp;gt;&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Selection Guide ==&lt;br /&gt;
&lt;br /&gt;
* Compare Guide (Reference from Max10 overview PDF)&lt;br /&gt;
{| class=&amp;quot;wikitable sortable&amp;quot;&lt;br /&gt;
|-&lt;br /&gt;
! Compare  !! LUTs !! UFM !! SRAM !! 18M !! PPLs !!  Feature&lt;br /&gt;
|-&lt;br /&gt;
| Intel MAX10 10M 02 SC M       || 2000 || 96 || 108 || 16 || 2  || Single Image  &lt;br /&gt;
|-&lt;br /&gt;
| Intel MAX10 10M 08 SC M       || 8000 || 1376 || 378 ||  24 || 2 || Dual Image  &lt;br /&gt;
|-&lt;br /&gt;
| Lattice ICE40 LP8K            || 7680 || 6000 || 128 ||  ||    || &lt;br /&gt;
|-&lt;br /&gt;
| Lattice MachXO2 LCM X02-256   || 256 || 0 || 0 ||    ||  || &lt;br /&gt;
|-&lt;br /&gt;
| Lattice MachXO2 LCM X02-4000  || 4320 || 96 || 92 ||    ||  ||   &lt;br /&gt;
|-&lt;br /&gt;
| Intel Cyclone IV EP4CE10 || 10,320 || 414 ||   || 15 || 2 || &lt;br /&gt;
|-&lt;br /&gt;
| '''Intel Cyclone IV EP4CE6'''       || 6272 || 270 ||   || 23 || 2 || &lt;br /&gt;
|-&lt;br /&gt;
| SPARTAN6 XC6 SLX9 || 9152 || || 576 || || || &lt;br /&gt;
|-&lt;br /&gt;
| Altera MAX II EPM240 || 240 || 8192 || || || || || &lt;br /&gt;
|}&lt;br /&gt;
* UFM (kbits) = User Flash&lt;br /&gt;
* EBR SRAM (kbits) = Internal RAM (M9K Memory (Kb))&lt;br /&gt;
* 18M = Embedded 18 × 18 multipliers&lt;br /&gt;
* PLLs = numbers&lt;br /&gt;
=== CPU + FPGA ===&lt;br /&gt;
* Zynq-7000 SoC - https://www.xilinx.com/products/silicon-devices/soc/zynq-7000.html#productTable&lt;br /&gt;
&lt;br /&gt;
== [[Lattice]] ==&lt;br /&gt;
* iCE40&lt;br /&gt;
&lt;br /&gt;
[[category: FPGA]]&lt;/div&gt;</summary>
		<author><name>Chao</name></author>
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